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NEW QUESTION: 1
Which of the following describes a computer processing architecture in which a language compiler or pre-processor breaks program instructions down into basic operations that can be performed by the processor at the same time?
A. Very-Long Instruction-Word Processor (VLIW)
B. Reduced-Instruction-Set-Computer (RISC)
C. Complex-Instruction-Set-Computer (CISC)
D. Super Scalar Processor Architecture (SCPA)
Answer: A
Explanation:
Very long instruction word (VLIW) describes a computer processing architecture in which a language compiler or pre-processor breaks program instruction down into basic operations that can be performed by the processor in parallel (that is, at the same time). These operations are put into a very long instruction word which the processor can then take apart without further analysis, handing each operation to an appropriate functional unit.
The following answer are incorrect:
The term "CISC" (complex instruction set computer or computing) refers to computers designed with a full set of computer instructions that were intended to provide needed capabilities in the most efficient way. Later, it was discovered that, by reducing the full set to only the most frequently used instructions, the computer would get more work done in a shorter amount of time for most applications. Intel's Pentium microprocessors are CISC microprocessors.
The PowerPC microprocessor, used in IBM's RISC System/6000 workstation and Macintosh computers, is a RISC microprocessor. RISC takes each of the longer, more complex instructions from a CISC design and reduces it to multiple instructions that are shorter and faster to process. RISC technology has been a staple of mobile devices for decades, but it is now finally poised to take on a serious role in data center servers and server virtualization. The latest RISC processors support virtualization and will change the way computing resources scale to meet workload demands.
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate. A superscalar processor executes more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to redundant functional units on the processor. Each functional unit is not a separate CPU core but an execution resource within a single CPU such as an arithmetic logic unit, a bit shifter, or a multiplier.
Reference(s) Used for this question:
http://whatis.techtarget.com/definition/0,,sid9_gci214395,00.html and http://searchcio-midmarket.techtarget.com/definition/CISC and http://en.wikipedia.org/wiki/Superscalar

NEW QUESTION: 2

A. Option D
B. Option C
C. Option A
D. Option B
Answer: B,D
Explanation:
Predictive DRS
Predictive DRS is a new feature that leverages the predictive analytics of vRealize Operations Manager with the powerful resource scheduler algorithm of vSphere DRS.
Together, these two products enable workload balancing for certain VMs before resource utilization spikes occur, potentially eliminating a great amount of resource contention that might have occurred in the past. vRealize Operations Manager runs its dynamic thresholds algorithm nightly against the VMs on which it collects data. These dynamic thresholds create forecasted metrics for the future utilization of the VMs. The metrics are then passed to vSphere DRS to determine the best placement and balance of VMs before resource utilization spikes occur. Predictive DRS helps prevent resource contention on hosts that run VMs with predictable utilization patterns.

NEW QUESTION: 3
技術者は、誤って終端されたネットワークケーブルを断続的なネットワークドロップの原因として特定します。技術者がネットワークケーブルを決定するために使用する必要があるツールは次のうちどれですか。
A. クリンパー
B. マルチメーター
C. ケーブルテスター
D. ループバックプラグ
Answer: A

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